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TI / ST / Toshiba · Integrated circuit

ULN2003 Darlington Array

Seven open-collector Darlington sinks with built-in clamp diodes, for relays, solenoids and 28BYJ-48 steppers.

Cheat sheet (SVG)
Logic level
Inputs 5 V TTL, outputs to 50 V
Package
PDIP-16 / SOIC-16

1.Pinout diagram

Highlight a signalhover to preview, click to keep

Pins 1-8

ULN2003

Pins 9-16

Pin detail

Hover a pin for its mappings and gotchas. Click to keep it here.

Logic level
Inputs 5 V TTL, outputs to 50 V
Package
PDIP-16 / SOIC-16

Fig. 1. ULN2003 Darlington Array, PDIP-16. Hover or tap a signal to light up every pin that carries it.

2.Watch out

3.Driving an inductive load

What has to go around the chip before it will run.

VCCGNDULN2003Wire link between COM (9) and VCCWire linkGND (8) to GNDLoad between COM (9) and OUT1 (16)LoadGND 8COM 9OUT1 16
Fig. 2. Driving an inductive load, drawn from Table 1. Crossing wires are not connected.
Table 1. External parts, and why each one is there.
PartBetween
Wire linkCOM (9) to VCC
LoadCOM (9) to OUT1 (16)

500 mA per channel, but not on all seven at once. Package dissipation caps the total around 1.5 W.

4.Full pin reference

Every pin, alias and mapping. This is the table that prints.

Table 2. Pin assignments.

Complete pin reference for ULN2003 Darlington Array
PinNameFunctions

Found a wrong pin? The whole board is one file, data/boards/uln2003.json.

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